Geometry Work Plan for 2026
Version 1.2
NOTE: Any dates assigned to items are to be considered just indicative.
- Items marked withrefer to new developments.
- Items marked withwill involve new man-power or contribution from external sources.
- Items marked withwill require coordination with more than one Working Group.
- Items marked with (*) may or may not be achieved.
- Navigation & optimisation:
- Use of multi-threading to speed up overlap checking for complex setups - (1)
Plan to parallelise over candidate volumes, using tasks and/or threads. Goal is to enable increased statistics for overlap checks.
- Improvements to parallel geometry initialisation for complex volumes- (1)/(2)
Apply parallelisation over axis order to tackle mother volumes with many daughters; reintroduce memory management for optimisation structures.
- Generate full geometry path for a given volume name - (1)/(2)
Descend the geometry tree and create list of touchables of a physical volume (given by name); for use by GPS generator for distributions, also requested previously by Geant4 users.
- Use of multi-threading to speed up overlap checking for complex setups - (1)
- Field transport:
- Introduce strict(er) default accuracy for field propagation - (2)
Adapt default values for HEP tracking detectors.
- Introduce strict(er) default accuracy for field propagation - (2)
- Solids modelling:
- Improve robustness and performance of selected Geant4 solids - (1)/(2)
Review implementation of selected solids in Geant4 for LHC and FCC production use.
- Improve robustness and performance of selected Geant4 solids - (1)/(2)
- VecGeom:
- Enhancements to deliver higher GPU navigation performance, and restructure
it for consistent behavior across CPU and GPU with a maintainable, portable
code base (CUDA/HIP) - (2)
- Simplify and standardise the navigation interface (including boundary behavior).
- Improve GPU navigation performance with new locality-aware accelerator.
- Replace recursion with iteration (esp. for Boolean solids).
- Remove vector constructs to simplify code and improve scalar performance.
- Add portability layer and refactor device code to POD + explicit dispatch (no device virtuals).
- Enhancements to deliver higher GPU navigation performance, and restructure
it for consistent behavior across CPU and GPU with a maintainable, portable
code base (CUDA/HIP) - (2)
- Routine activities
- Review of user documentation
(1) First semester
(2) Second semester
Created: 15 January 2026
Modified: 16 January 2026